# Generated by abuild 3.18.0_rc2-r0
# using fakeroot version 1.37.2
pkgname = verilator
pkgver = 5.050-r0
pkgdesc = Convert Verilog and SystemVerilog to C++ or SystemC
url = https://verilator.org
builddate = 1783366060
packager = Buildozer <alpine-devel@lists.alpinelinux.org>
size = 22158501
arch = armv7
origin = verilator
commit = 79a176cf7be1eb4d06e807bf7cf7b7933b367734
maintainer = Sören Tempel <soeren+alpine@soeren-tempel.net>
license = LGPL-3.0-only
depend = perl
# automatically detected:
provides = cmd:verilator=5.050-r0
provides = cmd:verilator_bin=5.050-r0
provides = cmd:verilator_bin_dbg=5.050-r0
provides = cmd:verilator_coverage=5.050-r0
provides = cmd:verilator_coverage_bin_dbg=5.050-r0
provides = cmd:verilator_gantt=5.050-r0
provides = cmd:verilator_profcfunc=5.050-r0
depend = so:libc.musl-armv7.so.1
datahash = 0f1921f6d928f66935efb2479ab5b5b431d2323d751615962e356563d3dfa293
