# Generated by abuild 3.18.0_rc3-r1
# using fakeroot version 1.37.2
pkgname = verilator-doc
pkgver = 5.050-r1
pkgdesc = Convert Verilog and SystemVerilog to C++ or SystemC (documentation)
url = https://verilator.org
builddate = 1784760087
packager = Buildozer <alpine-devel@lists.alpinelinux.org>
size = 10060
arch = noarch
origin = verilator
commit = eceb05f7d2e0e3a3dbb76cd8b196855d880046d7
license = LGPL-3.0-only
install_if = docs verilator=5.050-r1
# automatically detected:
datahash = 1aa08e4407ae879ee238d053e313bef7c20cb551ba4bfbf5f3416693ca3c428c
